高性能混合訊號式介面積體電路---子計劃四：高性能類比數位介面積體電路(I)

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DC Field	Value	Language
dc.contributor.author	吳介琮	en_US
dc.contributor.author	WU JIEH-TSORNG	en_US
dc.date.accessioned	2014-12-13T10:34:29Z	-
dc.date.available	2014-12-13T10:34:29Z	-
dc.date.issued	2002	en_US
dc.identifier.govdoc	NSC91-2215-E009-075	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/92770	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=784513&docId=150800	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	高性能混合訊號式介面積體電路---子計劃四：高性能類比數位介面積體電路(I)	zh_TW
dc.title	High-Performance Analog-Digital Interface Integrated Circuits(I)	en_US
dc.type	Plan	en_US
dc.contributor.department	交通大學電子工程系	zh_TW
Appears in Collections:	Research Plans

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