針對系統晶片 (SoC) 架構工作排程方法之探討及其模擬評估環境之研製

標題:	針對系統晶片 (SoC) 架構工作排程方法之探討及其模擬評估環境之研製 A Study of Task Scheduling Techniques for SoC Architecture and Implementation of Its Simulation and Evaluation Environment
作者:	陳正 CHEN CHENG 交通大學資訊工程系
公開日期:	2002
官方說明文件#:	NSC91-2213-E009-063
URI:	http://hdl.handle.net/11536/93036 https://www.grb.gov.tw/search/planDetail?id=751833&docId=142907
Appears in Collections:	Research Plans

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