完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 黃宇中 | en_US |
dc.contributor.author | HUANG YU-CHUNG | en_US |
dc.date.accessioned | 2014-12-13T10:35:35Z | - |
dc.date.available | 2014-12-13T10:35:35Z | - |
dc.date.issued | 2001 | en_US |
dc.identifier.govdoc | NSC90-2218-E009-023 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/93506 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=674301&docId=128528 | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 薄膜製程 | zh_TW |
dc.subject | 積體電路設計 | zh_TW |
dc.subject | Thin membrane process | en_US |
dc.subject | Integrated circuit design | en_US |
dc.title | 精密超薄型薄膜製程之開發 | zh_TW |
dc.title | A Development of the Precise Ultra Thin Membrane Process | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 交通大學電子工程系 | zh_TW |
顯示於類別: | 研究計畫 |