完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | 鍾乾癸 | en_US |
| dc.contributor.author | Chung, Chyan-Goei | en_US |
| dc.date.accessioned | 2014-12-13T10:38:26Z | - |
| dc.date.available | 2014-12-13T10:38:26Z | - |
| dc.date.issued | 1997 | en_US |
| dc.identifier.govdoc | NSC86-2213-E009-007 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/95373 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=303034&docId=55533 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.subject | 非同步傳輸模式 | zh_TW |
| dc.subject | 高速網路 | zh_TW |
| dc.subject | 通訊協定 | zh_TW |
| dc.subject | 正規語言 | zh_TW |
| dc.subject | 時態邏輯 | zh_TW |
| dc.subject | 網路模擬 | zh_TW |
| dc.subject | Asynchronous transfer mode (ATM) | en_US |
| dc.subject | High speed network | en_US |
| dc.subject | Communication protocol | en_US |
| dc.subject | Formal specification language | en_US |
| dc.subject | Temporal logic | en_US |
| dc.subject | Network simulation | en_US |
| dc.title | 整合性高速網路軟體工程環境之研究與設計---子計畫I：高速網路通訊協定之實證與驗證(II) | zh_TW |
| dc.title | Validation and Verification of High Speed Network Protocol (II) | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 交通大學資訊工程研究所 | zh_TW |
| 顯示於類別： | 研究計畫 | |
