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dc.contributor.author陳紹基en_US
dc.contributor.authorCHEN SAU-GEEen_US
dc.date.accessioned2014-12-13T10:38:28Z-
dc.date.available2014-12-13T10:38:28Z-
dc.date.issued1997en_US
dc.identifier.govdocNSC86-2221-E009-015zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/95417-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=271885&docId=48495en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.subject超大型積體電路設計zh_TW
dc.subject算術邏輯運算單元zh_TW
dc.subject浮點乘法器zh_TW
dc.subject除法器zh_TW
dc.subject三維影像重建zh_TW
dc.subject虛擬實境zh_TW
dc.subjectVLSI designen_US
dc.subjectALUen_US
dc.subjectFloating point multiplieren_US
dc.subjectDivideren_US
dc.subject3D image reconstructionen_US
dc.subjectVirtual realityen_US
dc.title電腦繪圖和視訊處理之超大型積體電路設計---電腦繪圖計算及其後處理核心單元之設計zh_TW
dc.titleDesign of Computation & Postprocessing Cores for Graphic Processingen_US
dc.typePlanen_US
dc.contributor.department交通大學電子工程學系zh_TW
Appears in Collections:Research Plans