Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Liang, ST | en_US |
dc.contributor.author | Yuang, MC | en_US |
dc.date.accessioned | 2014-12-08T15:02:16Z | - |
dc.date.available | 2014-12-08T15:02:16Z | - |
dc.date.issued | 1996-11-01 | en_US |
dc.identifier.issn | 0267-6192 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/957 | - |
dc.description.abstract | Asynchronous Transfer Mode (ATM) networks are expected to support to diverse mix of traffic sources demanding different Quality Of Service (QOS) guarantees. Regarding the Earliest-Due-Date (EDD) as one of the most promising scheduling disciplines offering delay guarantees in ATM switches, we provided in our previous work a decent queueing analysis for determining the urgency number (D-i) for each service class in an effort to offer 99% delay guarantees for higher delay priority calls under various traffic loads. To further evaluate the end-to-end delay distribution for an observed call, in this paper we present the departure process analysis for the EDD discipline with two urgency numbers D-0 = 0 and D-1 = D associated with two delay-based service classes (class 0 and class 1), respectively. The EDD-based ATM switch is modelled by a discrete-time, single-server queueing system with renewal and non-renewal arrivals. Based on the queueing model, we derive the interdeparture time distribution for the observed traffic stream being multiplexed with other traffic streams. The accuracy of the analysis is confirmed by simulation results. Numerical results demonstrate the characteristic reform of the periodic traffic stream after multiplexing through an EDD-based ATM switch. Since the derived departure process becomes the arrival process of the subsequent ATM switch along the pre-established virtual route, the analysis offers the realization of end-to-end delay computation for ATM networks. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Asynchronous Transfer Node (ATM) | en_US |
dc.subject | Quality of Service (QOS) | en_US |
dc.subject | Earliest-Due-Date (EDD) | en_US |
dc.subject | end-to-end delay | en_US |
dc.subject | departure process | en_US |
dc.title | Departure process analysis for earliest-due-date scheduling discipline in ATM switches | en_US |
dc.type | Article | en_US |
dc.identifier.journal | COMPUTER SYSTEMS SCIENCE AND ENGINEERING | en_US |
dc.citation.volume | 11 | en_US |
dc.citation.issue | 6 | en_US |
dc.citation.spage | 343 | en_US |
dc.citation.epage | 352 | en_US |
dc.contributor.department | 交大名義發表 | zh_TW |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | National Chiao Tung University | en_US |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:A1996WD46300004 | - |
dc.citation.woscount | 0 | - |
Appears in Collections: | Articles |