| 標題: | 次微米通信用高頻標準元晶片設計及測試(I) Design and Testing of Submicron High-Frequency Standard Cells for Telecommunications (I) |
| 作者: | 吳介琮 WU JIEH-TSORNG 國立交通大學電子工程系 |
| 關鍵字: | 超大型積體電路;數位類比混合式;細胞元資料庫;雙協助金屬氧化物半導體;Very large scale integrated circuit(VLSI);Digital and analog mixed signal;Cell library;Bi-complementary metal oxide silicon(Bi-CMOS) |
| 公開日期: | 1996 |
| 官方說明文件#: | TL-85-6104 |
| URI: | http://hdl.handle.net/11536/96058 https://www.grb.gov.tw/search/planDetail?id=251897&docId=46237 |
| 顯示於類別： | 研究計畫 |
- 次微米通信用高頻標準元晶片設計及測試(III) / 吳介宗
- 90奈米互補式金氧半製程下之多功能輸入/輸出元件庫設計 / 陳世範;Shih-Fan Chen;柯明道;Ming-Dou Ker
- Design of Mixed-Voltage-Tolerant Crystal Oscillator Circuit in Low-Voltage CMOS Technology / Wang, Tzu-Ming;Ker, Ming-Dou;Liao, Hung-Tai
- A new true-single-phase-clocking BiCMOS dynamic pipelined logic family for high-speed, low-voltage pipelined system applications / Tseng, YK;Wu, CY
- 低電壓互補式金氧半製程下的高電壓電路設計 / 陳世倫;Shih-Lun Chen;柯明道;Ming-Dou Ker
- Methodology on extracting compact layout rules for latchup prevention in deep-submicron bulk CMOS technology / Ker, MD;Lo, WY
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