標題: | An indexed-scaling pipelined FFT processor for OFDM-based WPAN applications |
作者: | Chen, Yuan Tsao, Yu-Chi Lin, Yu-Wei Lin, Chin-Hung Lee, Chen-Yi 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | convergent block floating point (CBFP);data scaling;fast Fourier transform (FFT);indexed-scaling;mixed-radix multipath delay feedback (MRMDF);orthogonal frequency-division multiplexing (OFDM);wireless personal area network (WPAN) |
公開日期: | 1-二月-2008 |
摘要: | In this brief, a high-throughput and low-complexity fast Fourier transform (FFT) processor for wideband orthogonal frequency division multiplexing communication systems is presented. A new indexed-scaling method is proposed to reduce both the critical-path delay and hardware cost by employing shorter wordlength. Together with the mixed-radix multipath delay feedback structure, the proposed FFT processor can achieve very high throughput with low hardware cost. From analysis, it is shown that the proposed indexed-scaling method can save at least 11% memory utilizations compared to other state-of-the-art scaling algorithms. Also,,a-test chip of a 1.2 Gsample/s 2048-point FFT processor has been designed using UMC 90-nm 1P9M process with a core area of 0.97 mm(2). The signal-to-quantization-noise ratio (SQNR) performance of this test chip is over 32.7 dB to support 16-QAM modulation and the power consumption is about 117 mW at 300 MHz. Compared to the fixed-point FFT processors, about 26% area and 28% power can be saved under the same throughput and SQNR specifications. |
URI: | http://dx.doi.org/10.1109/TCSII.2007.910771 http://hdl.handle.net/11536/9694 |
ISSN: | 1549-7747 |
DOI: | 10.1109/TCSII.2007.910771 |
期刊: | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS |
Volume: | 55 |
Issue: | 2 |
起始頁: | 146 |
結束頁: | 150 |
顯示於類別: | 期刊論文 |