Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 蕭培墉 | en_US |
dc.date.accessioned | 2014-12-13T10:40:14Z | - |
dc.date.available | 2014-12-13T10:40:14Z | - |
dc.date.issued | 1994 | en_US |
dc.identifier.govdoc | NSC83-0404-E009-010 | zh_TW |
dc.identifier.uri | http://hdl.handle.net/11536/97310 | - |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=110418&docId=17628 | en_US |
dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.title | 多層邏輯設計最佳化研究 | zh_TW |
dc.title | Optimization of Multi-Level Logic Design | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 交通大學資訊科學研究所 | zh_TW |
Appears in Collections: | Research Plans |