以圖型應用為主的用戶端多核心嵌入式系統---子計畫二：用戶端多核心嵌入式系統可適性耗能剖析、監測與改善( I )

Abstract

隨著無線網路與通訊技術的蓬勃發展，行動通訊服務漸漸朝向由具備強大計算能力的 ’雲’加上輸出輸入 (I/O) 為主的行動終 ’端’ 所組合而成。而未來這類型的多核心行動終端裝置將繼續朝向具備強大圖型顯示能力、多核心與低耗電的方向演進。在這樣的演進趨勢下，如何提供行動終端裝置系統設計者在系統設計階段 (Design Phase)，一個有彈性、方便、快速且準確的耗能剖析工具，以及執行階段 (Run-Time Phase) 之動態耗能即時監測與管理機制將是一個重要的研究主題。本計畫的主要目的在於研究以圖型應用為主的用戶端多核心嵌入式系統之設計階段耗能剖析與執行階段耗能偵測與管理技術。計畫以三年時間完成下列研究與工具開發，包括 (1) 研究可適性 (Adaptive) 之多核心嵌入式系統之耗能模型 (Models) 與剖析 (Profiling) 技術，提出一套可適性耗能模型與剖析架構，滿足設計者針對情境、不同等級之剖析精準度、剖析粗細度 (Granularity) 與剖析負擔 (Overhead) 進行耗能分析，同時透過單一架構支援設計階段與執行階段之耗能剖析。(2) 研究適用於圖型應用為主的多核心嵌入式系統晶片架構之耗能剖析架構、機制與硬體設計，提出包含處理器內部、同質、異質處理器間、記憶體階層架構 (Memory Hierarchy)、記憶體與輸出入匯流排 (Bus)、輸出入裝置等之硬體耗能剖析機制、計時器、計數器 (Counters) 與暫存器 (Registers) 等架構與設計。(3) 建構在上述可適性剖析架構之上，提出低負擔之動態耗能偵測與管理技術，並透過電源管理函式庫的支援，提供設計者針對執行階段，因應外界環境因素，如頻寬、電池電量、顯示畫面大小、環境亮度等，進行動態耗能的調校與最佳化。

Advances in cloud computing and mobile communication technologies make it possible to rich mobile applications and services based on a cloud computing infrastructure. It is believed that future mobile devices could achieve high performance, e.g. using multi-core, have powerful I/Os, i.e. supporting 3D graphic and broadband wireless communications, but it must be still low-power. Hence, to reduce and manage the power consumption of advanced mobile devices become very critical and important research topics. This project is to design development the design-phase energy profiling tool and run-time power management for multi-core mobile devices which support high-quality graphic applications. The adaptive energy profiling tool could help system designers and software designers in improving the energy efficiency of their systems and software during design phase, and the power management run-time support is to assist power-aware graphic applications to optimize the power consumption according to the run-time parameters. In this project, we will (1) propose adaptive power consumption models and profiling architecture so that designers could have a tradeoff between profiling overhead and profiling accuracy based on their needs； (2) investigate and propose the hardware mechanisms, timers, counters, registers, and hardware framework for profiling the energy consumption of the multi-core embedded systems which emphasize on 3D graphic applications. The power consumption and energy profiling issues of homogeneous multi-core, heterogeneous multi-core, inter-processor communications, memory hierarchy, interconnect bus, and I/O devices will be all considered； (3) based on the profiling architecture, a low-overhead run-time energy monitoring architecture and run-time power management support will be proposed and developed. With run-time power management support, 3D graphic programmers could dynamically adjust and optimize their software based on the remaining energy, communication speeds, display size, etc.