完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWu, Woei-Cherngen_US
dc.contributor.authorChao, Tien-Shengen_US
dc.contributor.authorChiu, Te-Hsinen_US
dc.contributor.authorWang, Jer-Chyien_US
dc.contributor.authorLai, Chao-Sungen_US
dc.contributor.authorMa, Ming-Wenen_US
dc.contributor.authorLo, Wen-Chengen_US
dc.date.accessioned2014-12-08T15:12:56Z-
dc.date.available2014-12-08T15:12:56Z-
dc.date.issued2008en_US
dc.identifier.issn1099-0062en_US
dc.identifier.urihttp://hdl.handle.net/11536/9982-
dc.identifier.urihttp://dx.doi.org/10.1149/1.2938021en_US
dc.description.abstractIn this paper, high-performance contact etching stop layer (CESL)-strained n-metal-oxide-semiconductor field effect transistor (nMOSFET) with HfO2 gate dielectrics has been successfully demonstrated. The effects of the CESL layer to the high-k without trapping behaviors are investigated by the pulse current-voltage (IV) technique for the first time. It is found that a roughly 55 and 60% increase of mobility and I-ON, respectively, can be achieved for the 300 nm CESL HfO2 nMOSFET using pulsed-IV measurement. Furthermore, a superior HfO2/Si interface for CESL devices is observed, demonstrated by an obvious interface state density reduction (6 x 10(11)-9 x 10(10) cm(-2)).en_US
dc.language.isoen_USen_US
dc.titlePerformance and interface characterization for contact etch stop layer-strained nMOSFET with HfO2 gate dielectrics under pulsed-IV measurementen_US
dc.typeArticleen_US
dc.identifier.doi10.1149/1.2938021en_US
dc.identifier.journalELECTROCHEMICAL AND SOLID STATE LETTERSen_US
dc.citation.volume11en_US
dc.citation.issue8en_US
dc.citation.spageH230en_US
dc.citation.epageH232en_US
dc.contributor.department電子物理學系zh_TW
dc.contributor.departmentDepartment of Electrophysicsen_US
dc.identifier.wosnumberWOS:000256706100025-
dc.citation.woscount2-
顯示於類別:期刊論文