具奈米點之電阻式記憶體元件製作與物理機制研究

Abstract

隨著浮停閘非揮發性記憶體的尺寸持續微縮之下，浮停閘記憶體的穿遂氧化層面臨到元件可靠度 的問題。最主要是薄穿遂氧化層在多次的寫入與抹除之後，穿遂氧化層會產生漏電路徑，導致元件內 儲存的電荷消失，使得記憶狀態發生錯誤。近年來，電阻式切換記憶體被學界與業界廣泛的研究，以 期應用於非揮發性記憶體。有別於傳統的浮停閘元件，電阻式記憶體的結構主要由上電極/電阻轉態層 /下電極所構成，可利用電壓或者電流來改變轉態層內的阻值，且在電源移除後，仍然保留原來的電阻 值，而達到非揮發性記憶體的功能。由於電阻式記憶體並沒有傳統元件穿遂氧化層微縮的問題，且電 阻式記憶體具有操作電壓低、體積小與操作速度快等優點，被視為下世代非揮發性記憶體元件的主要 選擇。 本計畫將研究奈米點嵌入電阻式切換記憶體特性的影響，並探討記憶體的電阻轉態機制，藉由對 機制的釐清，改善電阻式記憶體的記憶特性。計畫的第一年，我們將發展具有奈米點之電阻式記憶 體的元件製程，並研究不同奈米點結構之電阻式記憶體，探討不同奈米點位置對於電阻轉換特性 的影響，並且也將研究單層與多層奈米點的差別，分析多層奈米點是否能進一步改善電阻轉換特 性的均勻度。第二年，我們將針對第一年所製作的奈米點嵌入式記憶體做完整的電性分析與物理 機制探討。目前電阻式記憶體的物理機制與操作特性，尚未有明確的結果，這些原因都將影響電 阻式記憶體的發展。在第二年中，我們將針對第一年所製作的記憶體元件，進行完整的電性量測， 包含操作參數的萃取與記憶體特性的探討，並結合元件的計算與模擬進而推論電阻式記憶體轉態 的完整物理機制，以及奈米點對電阻式記憶體造成影響的物理機制。為了更進一步釐清與驗證所 提的機制，我們將研究電阻式記憶體在變溫條件下之電阻轉換特性，並且利用低溫(300K~4K)量測環 境，排除因熱擾動所造成之效應，藉此研究其電阻轉換機制與溫度之關係，釐清元件的電流傳導機制， 再比對我們提出的模型，如此細節的探討將有助於電阻式記憶體的電阻轉換物理機制釐清，並建立正 確之物理機制模型。

As the device scales down increasingly, the tunnel oxide in conventional nonvolatile flash memory encounters reliability issues. After several programming/erasing operations, the thin oxide in the memory can be damaged which generates leakage path in the tunnel oxide. The path can connects charge storage layer and substrate resulting in loss of the stored charges and error status in the memory. Recently, resistance switching memory has received increasing attentions for the novel technology applications, especially for the nonvolatile memory technology. Unlike conventional floating gate structure, the resistance switching memory is composed of top electrode/resistance switching layer/bottom electrode. The resistance status of the memory can be switched by applying an external bias voltage or current. After the removing of bias, the resistance of the memory can remain resistance status. There is no tunnel oxide thinning issues and the memory can be operated at low bias voltage with high speed. The resistance switching memory is a potential candidate for the next generation nonvolatile memory. This project focuses on the fabrication of nanocrystals influence on resistance switching memory and investigation on their relevant physical characteristics for application on the next generation nonvolatile memory devices. In the first year, we will develop the process of the resistance switching memory with embedded nanocrsytal structure and study the influence of different structures on the resistance switching characteristics. We will also analyze the uniformity for the memory devices with single or multi nanocrystals layer(s). In the secondary year, we will investigate the electrical characteristics of the nanocrystal embedded memory and the related resistance switching mechanisms. To date, there is no explicit mechanism to interpret the resistance switching. In this year, we will measure the memory devices fabricated in first year in more detail, including extraction for the values of high and low resistance status, set and rest voltages, retention and endurance. In addition, we will perform the model calculation and simulation for the proposed model to understand the influence of nanocrystals on the switching mechanism. In order to clarify the proposed model, we will measure the electrical characteristics at different temperatures, especially at low temperatures (300K~4K) for the thermal effect elimination. Therefore, we can investigate the dependence between switching behaviors and temperatures more carefully, and establish the correct physical mechanism models.