Transient-induced latchup dependence on power-pin damping frequency and damping factor in CMOS integrated circuits
| dc.citation.epage | 2010 | en_US |
| dc.citation.issue | 8 | en_US |
| dc.citation.spage | 2002 | en_US |
| dc.citation.volume | 54 | en_US |
| dc.citation.woscount | 2 | |
| dc.contributor.author | Hsu, Sheng-Fu | en_US |
| dc.contributor.author | Ker, Ming-Dou | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:13:37Z | |
| dc.date.available | 2014-12-08T15:13:37Z | |
| dc.date.issued | 2007-08-01 | en_US |
| dc.description.abstract | The bipolar (underdamped sinusoidal) transient noise on power pins of CMOS integrated circuits (ICs) can trigger latchup in CMOS ICs under system-level electrostatic-discharge test. Two dominant parameters of bipolar transient noise-damping frequency and damping factor-strongly depend on system shielding, board-level noise filter, chip-/board-level layout, etc. The transient-induced-latchup (TLU) dependence on power-pin damping frequency and damping factor was characterized by device simulation and verified by experimental measurement. From the simulation results, bipolar-trigger waveforms with damping frequencies of several tens of megahertz can trigger the TLU.most easily. However, TLU is less sensitive to the bipolar-trigger waveforms with an excessively large damping factor or an excessively low/high damping frequency. The simulation results have been experimentally verified with the silicon-controlled-rectifier (SCR) test structures that are fabricated in a 0.25-mu m CMOS technology. | en_US |
| dc.identifier.doi | 10.1109/TED.2007.901391 | en_US |
| dc.identifier.issn | 0018-9383 | en_US |
| dc.identifier.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/TED.2007.901391 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/10524 | |
| dc.identifier.wosnumber | WOS:000248390600024 | |
| dc.language.iso | en_US | en_US |
| dc.subject | bipolar-trigger voltage | en_US |
| dc.subject | latchup | en_US |
| dc.subject | silicon-controlled rectifier (SCR) | en_US |
| dc.subject | system-level electrostatic-discharge (ESD) test | en_US |
| dc.subject | transient-induced latchup (TLU) | en_US |
| dc.title | Transient-induced latchup dependence on power-pin damping frequency and damping factor in CMOS integrated circuits | en_US |
| dc.type | Article | en_US |