Improvement in RF performance of 40-nm InAs-channel based HEMTs using Pt gate sinking with two-step recess processes technology

dc.citation.epage2628en_US
dc.citation.issue12en_US
dc.citation.spage2625en_US
dc.citation.volume87en_US
dc.citation.woscount2
dc.contributor.authorKuo, Chien-Ien_US
dc.contributor.authorHsu, Heng-Tungen_US
dc.contributor.authorWu, Chien-Yingen_US
dc.contributor.authorChang, Edward Y.en_US
dc.contributor.authorChen, Yu-Linen_US
dc.contributor.authorLim, Wee-Chinen_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.date.accessioned2014-12-08T15:38:24Z
dc.date.available2014-12-08T15:38:24Z
dc.date.issued2010-12-01en_US
dc.description.abstractForty-nanometer lnAs HEMT devices fabricated by two-step recess and Pt-buried gate were demonstrated for low-noise and low-power millimeter wave applications. The device exhibited a high transconductance of 1650 mS/mm at a drain voltage of 0.5 V. Improvement of the current-gain cutoff frequency from 395 GHz to 423 GHz was achieved with minimum noise figure below 2.5 dB up to 64 GHz at only 4.33 mW DC power consumption level. Besides, the output conductance was decreased from 2400 mS/ mm to 325 mS/mm. These superior performances are attributed to mitigation of the short-channel effect through the proposed technology. (C) 2010 Elsevier B.V. All rights reserved.en_US
dc.identifier.doi10.1016/j.mee.2010.07.027en_US
dc.identifier.issn0167-9317en_US
dc.identifier.journalMICROELECTRONIC ENGINEERINGen_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.mee.2010.07.027en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/26292
dc.identifier.wosnumberWOS:000282206100032
dc.language.isoen_USen_US
dc.titleImprovement in RF performance of 40-nm InAs-channel based HEMTs using Pt gate sinking with two-step recess processes technologyen_US
dc.typeArticleen_US

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