PROBABILISTIC MODELING AND FAULT ANALYSIS IN SEQUENTIAL LOGIC USING COMPUTER-SIMULATION
| dc.citation.epage | 498 | en_US |
| dc.citation.issue | 2 | en_US |
| dc.citation.spage | 490 | en_US |
| dc.citation.volume | 20 | en_US |
| dc.citation.woscount | 4 | |
| dc.contributor.author | DAS, SR | en_US |
| dc.contributor.author | JONE, WB | en_US |
| dc.contributor.author | WONG, KL | en_US |
| dc.contributor.department | 資訊工程學系 | zh_TW |
| dc.contributor.department | Department of Computer Science | en_US |
| dc.date.accessioned | 2014-12-08T15:05:38Z | |
| dc.date.available | 2014-12-08T15:05:38Z | |
| dc.date.issued | 1990-03-01 | en_US |
| dc.identifier.doi | 10.1109/21.52558 | en_US |
| dc.identifier.issn | 0018-9472 | en_US |
| dc.identifier.journal | IEEE TRANSACTIONS ON SYSTEMS MAN AND CYBERNETICS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/21.52558 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/4172 | |
| dc.identifier.wosnumber | WOS:A1990DG60600019 | |
| dc.language.iso | en_US | en_US |
| dc.title | PROBABILISTIC MODELING AND FAULT ANALYSIS IN SEQUENTIAL LOGIC USING COMPUTER-SIMULATION | en_US |
| dc.type | Letter | en_US |