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Performance and reliability of low-temperature polysilicon TFT with a novel stack gate dielectric and stack optimization using PECVD nitrous oxide plasma

dc.citation.epage67en_US
dc.citation.issue1en_US
dc.citation.spage63en_US
dc.citation.volume51en_US
dc.citation.woscount8
dc.contributor.authorChang, KMen_US
dc.contributor.authorYang, WCen_US
dc.contributor.authorTsai, CPen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:39:47Z
dc.date.available2014-12-08T15:39:47Z
dc.date.issued2004-01-01en_US
dc.description.abstractThis paper proposes a novel tetraethylorthosilicate (TEOS)/oxynitride stack gate dielectric for low-temperature poly-Si thin-film transistors, composed of a plasma-enhanced chemical vapor deposition (PECVD) thick TEOS oxide/ultrathin, oxynitride grown by PECVD N2O plasma. The novel stack gate dielectric exhibits a very high electrical breakdown field of 8.5 MV/cm, which is approximately 3 MV/cm higher than traditional PECVD TEOS oxide. The novel stack oxide also has better interface quality, lower bulk-trap density, and higher long-term reliability than PECVD TEOS dielectrics. These improvements are attributed to the formation of strong Si drop N bonds of high quality ultra-thin oxynitride grown by PEVCD N2O plasma, and the reduction in the trap density at the oxynitride/poly-Si interface.en_US
dc.identifier.doi10.1109/TED.2003.820791en_US
dc.identifier.issn0018-9383en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2003.820791en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/27177
dc.identifier.wosnumberWOS:000187959600009
dc.language.isoen_USen_US
dc.subjectdielectric filmsen_US
dc.subjectgate oxideen_US
dc.subjectnitrous oxide plasmaen_US
dc.subjectpolycrystalline-silicon thin-film transistor (polysilicon TFT)en_US
dc.subjectreliabilityen_US
dc.titlePerformance and reliability of low-temperature polysilicon TFT with a novel stack gate dielectric and stack optimization using PECVD nitrous oxide plasmaen_US
dc.typeArticleen_US

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