A study of tilt angle effect on Halo PMOS performance
| dc.citation.epage | 1512 | en_US |
| dc.citation.issue | 9 | en_US |
| dc.citation.spage | 1503 | en_US |
| dc.citation.volume | 38 | en_US |
| dc.citation.woscount | 4 | |
| dc.contributor.author | Su, JG | en_US |
| dc.contributor.author | Wong, SC | en_US |
| dc.contributor.author | Huang, CT | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:48:46Z | |
| dc.date.available | 2014-12-08T15:48:46Z | |
| dc.date.issued | 1998-09-01 | en_US |
| dc.description.abstract | The Halo structure is usually adopted in deep submicrometer MOS devices for punchthrough prevention. The tilt angle of the Halo implant determines the dopant distribution which induces anti-punchthrough operation. In this paper, we investigate the impact of the tilt angle on the Halo PMOS device performance via two-dimensional (2D) simulations. We find that the ratio of on-current to off-current is constant for all tilt angles of Halo implant, implying an equivalent DC performance for all tilt angles. The equivalence can be traced back to a self compensation between the body factor and source resistance. The result :implies that a low tilt angle should be adopted for Halo devices, for it gives a small threshold voltage and thus a high noise margin. The methodology used in analyzing body factor and source resistance can also be applied to analyze other devices. (C) 1998 Elsevier Science Ltd. All rights reserved. | en_US |
| dc.identifier.issn | 0026-2714 | en_US |
| dc.identifier.journal | MICROELECTRONICS AND RELIABILITY | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/32433 | |
| dc.identifier.wosnumber | WOS:000077017500019 | |
| dc.language.iso | en_US | en_US |
| dc.title | A study of tilt angle effect on Halo PMOS performance | en_US |
| dc.type | Article | en_US |