High Mobilities in Layered InSe Transistors with Indium-Encapsulation-Induced Surface Charge Doping

Abstract

Tunability and stability in the electrical properties of 2D semiconductors pave the way for their practical applications in logic devices. A robust layered indium selenide (InSe) field-effect transistor (FET) with superior controlled stability is demonstrated by depositing an indium (In) doping layer. The optimized InSe FETs deliver an unprecedented high electron mobility up to 3700 cm(2) V-1 s(-1) at room temperature, which can be retained with 60% after 1 month. Further insight into the evolution of the position of the Fermi level and the microscopic device structure with different In thicknesses demonstrates an enhanced electron-doping behavior at the In/InSe interface. Furthermore, the contact resistance is also improved through the In insertion between InSe and Au electrodes, which coincides with the analysis of the low-frequency noise. The carrier fluctuation is attributed to the dominance of the phonon scattering events, which agrees with the observation of the temperature-dependent mobility. Finally, the flexible functionalities of the logic-circuit applications, for instance, inverter and not-and (NAND)/not-or (NOR) gates, are determined with these surface-doping InSe FETs, which establish a paradigm for 2D-based materials to overcome the bottleneck in the development of electronic devices.