UNIFIED ARRAY ARCHITECTURE FOR DISCRETE COSINE TRANSFORM, SINE TRANSFORM AND THEIR INVERSES
| dc.citation.epage | 1812 | en_US |
| dc.citation.issue | 21 | en_US |
| dc.citation.spage | 1811 | en_US |
| dc.citation.volume | 31 | en_US |
| dc.citation.woscount | 5 | |
| dc.contributor.author | GUO, JI | en_US |
| dc.contributor.author | CHEN, CS | en_US |
| dc.contributor.author | JEN, CW | en_US |
| dc.contributor.department | 電控工程研究所 | zh_TW |
| dc.contributor.department | Institute of Electrical and Control Engineering | en_US |
| dc.date.accessioned | 2014-12-08T15:03:08Z | |
| dc.date.available | 2014-12-08T15:03:08Z | |
| dc.date.issued | 1995-10-12 | en_US |
| dc.description.abstract | A unified array design for the discrete cosine transform, discrete sine transform and their inverses based on a new general formulation is presented. The presented design provides the flexibility to adaptively select different types of transforms in transform coding according to the characteristics of images for minimising the bit rate as much as possible. | en_US |
| dc.identifier.doi | 10.1049/el:19951254 | en_US |
| dc.identifier.issn | 0013-5194 | en_US |
| dc.identifier.journal | ELECTRONICS LETTERS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1049/el:19951254 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/1700 | |
| dc.identifier.wosnumber | WOS:A1995TA92000013 | |
| dc.language.iso | en_US | en_US |
| dc.subject | DISCRETE COSINE TRANSFORMS | en_US |
| dc.subject | SINE TRANSFORMS | en_US |
| dc.subject | SYSTOLIC ARRAYS | en_US |
| dc.title | UNIFIED ARRAY ARCHITECTURE FOR DISCRETE COSINE TRANSFORM, SINE TRANSFORM AND THEIR INVERSES | en_US |
| dc.type | Article | en_US |