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High-performance SrTiO3 MIM capacitors for analog applications

dc.citation.epage2319en_US
dc.citation.issue9en_US
dc.citation.spage2312en_US
dc.citation.volume53en_US
dc.citation.woscount65
dc.contributor.authorChiang, K. C.en_US
dc.contributor.authorHuang, Ching-Chienen_US
dc.contributor.authorChen, G. L.en_US
dc.contributor.authorChen, Wen Jauhen_US
dc.contributor.authorKao, H. L.en_US
dc.contributor.authorWu, Yung-Hsienen_US
dc.contributor.authorChin, Alberten_US
dc.contributor.authorMcAlister, Sean P.en_US
dc.contributor.department奈米科技中心zh_TW
dc.contributor.departmentCenter for Nanoscience and Technologyen_US
dc.date.accessioned2014-12-08T15:15:50Z
dc.date.available2014-12-08T15:15:50Z
dc.date.issued2006-09-01en_US
dc.description.abstractTAN/SrTiO3/TaN capacitors with a capacitance density of 28-35 fF/mu m(2) have been developed by using a high-kappa (kappa = 147-169) SrTiO3 dielectric containing nanometersized microcrystals (3-10 nm). A small capacitance effective thickness was achieved by reducing the interfacial TaON using N+ treatment on the lower TaN electrode during post-deposition annealing. The small (92 ppm/V-2) voltage coefficient of the capacitance and the 3 x 10(-8) A/cm(2) leakage current at 2 V exceed the International Technology Roadmap for Semiconductors' requirements for analog capacitors at year 2018.en_US
dc.identifier.doi10.1109/TED.2006.881013en_US
dc.identifier.issn0018-9383en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2006.881013en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/11818
dc.identifier.wosnumberWOS:000240076500041
dc.language.isoen_USen_US
dc.subjectcapacitoren_US
dc.subjectInternational Technology Roadmap for Semiconductors (ITRS)en_US
dc.subjectmetal-insulator-metal (MIM)en_US
dc.subjectSrTiO3 (STO)en_US
dc.titleHigh-performance SrTiO3 MIM capacitors for analog applicationsen_US
dc.typeArticleen_US

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