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應用良率分析於生產不同積體電路產品之生產線製造績效評估之研究

dc.contributor.author唐麗英en_US
dc.contributor.authorTONG LEE-INGen_US
dc.contributor.department交通大學工業工程與管理系zh_TW
dc.date.accessioned2014-12-13T10:37:31Z
dc.date.available2014-12-13T10:37:31Z
dc.date.issued1999en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.identifier.govdocNSC88-2213-E009-033zh_TW
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=460934&docId=84442en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/94708
dc.language.isozh_TWen_US
dc.subject積體電路zh_TW
dc.subject良率分析zh_TW
dc.subject績效評估zh_TW
dc.subject修正卜松模式zh_TW
dc.subjectIntegrated circuit (IC)en_US
dc.subjectYield analysisen_US
dc.subjectPerformance evaluationen_US
dc.subjectModified Poisson modelen_US
dc.title應用良率分析於生產不同積體電路產品之生產線製造績效評估之研究zh_TW
dc.titleApplication of Yield Analysis on Manufacturing Performance Evaluation of Integrated Circuits Production Linesen_US
dc.typePlanen_US

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