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Characteristic of p-Type Junctionless Gate-All-Around Nanowire Transistor and Sensitivity Analysis

dc.citation.epage159en_US
dc.citation.issue2en_US
dc.citation.spage157en_US
dc.citation.volume34en_US
dc.citation.woscount5
dc.contributor.authorHan, Ming-Hungen_US
dc.contributor.authorChang, Chun-Yenen_US
dc.contributor.authorJhan, Yi-Rueien_US
dc.contributor.authorWu, Jia-Jiunen_US
dc.contributor.authorChen, Hung-Binen_US
dc.contributor.authorCheng, Ya-Chien_US
dc.contributor.authorWu, Yung-Chunen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:29:10Z
dc.date.available2014-12-08T15:29:10Z
dc.date.issued2013-02-01en_US
dc.description.abstractThe characteristics and sensitivities of p-type junctionless (JL) gate-all-around (GAA) (JLGAA) nanowire transistors are demonstrated by simulating a 3-D quantum transport device with a view to their use in CMOS technology. The concentration of dopants in a p-type JL nanowire transistor is not as high as that in an n-type device owing to solid solubility of boron in silicon. However, we can use a midgap material as gate electrode to design an appropriate device threshold voltage. The p-type JLGAA transistor exhibits a favorable on/off current ratio and better short-channel characteristics than a conventional inversion-mode transistor with a GAA structure. Sensitivity analyses reveal that the channel thickness and random dopant fluctuation substantially affect the device performance in terms of threshold voltage (V-th), on current (I-on), and subthreshold slope because of the full depletion condition of the channel. The channel length and oxide thickness have less impact because the short-channel effect is well controlled.en_US
dc.identifier.doi10.1109/LED.2012.2229105en_US
dc.identifier.issn0741-3106en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2012.2229105en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/21018
dc.identifier.wosnumberWOS:000314173200003
dc.language.isoen_USen_US
dc.subjectGate-all-around (GAA)en_US
dc.subjectjunctionless (JL)en_US
dc.subjectnanowire transistoren_US
dc.subjectsensitivityen_US
dc.titleCharacteristic of p-Type Junctionless Gate-All-Around Nanowire Transistor and Sensitivity Analysisen_US
dc.typeArticleen_US

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