Electrical and Reliability Investigation of Cu TSVs With Low-Temperature Cu/Sn and BCB Hybrid Bond Scheme
| dc.citation.epage | 104 | en_US |
| dc.citation.issue | 1 | en_US |
| dc.citation.spage | 102 | en_US |
| dc.citation.volume | 34 | en_US |
| dc.citation.woscount | 5 | |
| dc.contributor.author | Chang, Yao-Jen | en_US |
| dc.contributor.author | Ko, Cheng-Ta | en_US |
| dc.contributor.author | Chen, Kuan-Neng | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:28:43Z | |
| dc.date.available | 2014-12-08T15:28:43Z | |
| dc.date.issued | 2013-01-01 | en_US |
| dc.description.abstract | A wafer-level 3-D integration scheme using Cu through-silicon vias (TSVs) and fine-pitch Cu/Sn-BCB hybrid bonding was developed and investigated with electrical characterization and reliability assessment. The hybrid bonding could be achieved below 250 degrees C. Low Kelvin resistance and stable daisy chain resistance were achieved in 5- and 10-mu m TSV test structures across the whole wafer. Without obvious deterioration in reliability test results, the integrated Cu TSV and hybrid bond scheme can be potentially designed for 3-D integration applications. | en_US |
| dc.identifier.doi | 10.1109/LED.2012.2225136 | en_US |
| dc.identifier.issn | 0741-3106 | en_US |
| dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/LED.2012.2225136 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/20786 | |
| dc.identifier.wosnumber | WOS:000312834200034 | |
| dc.language.iso | en_US | en_US |
| dc.subject | Hybrid bonding | en_US |
| dc.subject | through-silicon via (TSV) | en_US |
| dc.subject | 3-D integration | en_US |
| dc.title | Electrical and Reliability Investigation of Cu TSVs With Low-Temperature Cu/Sn and BCB Hybrid Bond Scheme | en_US |
| dc.type | Article | en_US |