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Si nanocrystal memory devices self-assembled by in situ rapid thermal annealing of ultrathin a-Si on SiO2

dc.citation.epageH304en_US
dc.citation.issue10en_US
dc.citation.spageH302en_US
dc.citation.volume10en_US
dc.citation.woscount6
dc.contributor.authorChen, Jian-Haoen_US
dc.contributor.authorLei, Tan-Fuen_US
dc.contributor.authorLandheer, Dolfen_US
dc.contributor.authorWu, Xiaohuaen_US
dc.contributor.authorLiu, Jianen_US
dc.contributor.authorChao, Tien-Shengen_US
dc.contributor.department電子物理學系zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electrophysicsen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:15:11Z
dc.date.available2014-12-08T15:15:11Z
dc.date.issued2007en_US
dc.description.abstractSi-nanocrystal memories have been fabricated using the thermal agglomeration of an ultrathin (0.9-3.5 nm) amorphous Si (a-Si) film. The a-Si was deposited by electron beam evaporation followed by in situ annealing at 850 C for 5 min. Hemispherical nanocrystals were obtained with a dot density up to 3.9 x 10(11) cm(-2), and a stored charge density of 4.1 x 10(12) cm(-2) (electron + hole) was achieved. The data retention characteristics of nanocrystal-embedded devices have shown a 1 V memory window after 100 h. Well-separated Si nanocrystals with a 23-32% surface-coverage ratio have been successfully demonstrated. The process compatibility of the proposed technique was also discussed. (C) 2007 The Electrochemical Society.en_US
dc.identifier.doi10.1149/1.2764459en_US
dc.identifier.issn1099-0062en_US
dc.identifier.journalELECTROCHEMICAL AND SOLID STATE LETTERSen_US
dc.identifier.urihttp://dx.doi.org/10.1149/1.2764459en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/11413
dc.identifier.wosnumberWOS:000248659800025
dc.language.isoen_USen_US
dc.titleSi nanocrystal memory devices self-assembled by in situ rapid thermal annealing of ultrathin a-Si on SiO2en_US
dc.typeArticleen_US

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