A Low Operating Voltage ZnO Thin Film Transistor Using a High-kappa HfLaO Gate Dielectric
| dc.citation.epage | II11 | en_US |
| dc.citation.issue | 1 | en_US |
| dc.citation.spage | II8 | en_US |
| dc.citation.volume | 13 | en_US |
| dc.citation.woscount | 10 | |
| dc.contributor.author | Su, N. C. | en_US |
| dc.contributor.author | Wang, S. J. | en_US |
| dc.contributor.author | Chin, Albert | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:07:53Z | |
| dc.date.available | 2014-12-08T15:07:53Z | |
| dc.date.issued | 2010 | en_US |
| dc.description.abstract | This study demonstrates the feasibility of producing a ZnO thin film transistor (TFT) using hafnium-lanthanum-oxide (HfLaO) as the gate dielectric. By integrating high-kappa HfLaO with an amorphous ZnO channel, the resulting HfLaO/ZnO TFTs display a low threshold voltage (V(T)) of 0.28 V, a small subthreshold swing (SS) of 0.26 V/dec, an acceptable mobility (mu(sat)) of 3.5 cm(2)/V s, and a good I(on)/I(off) ratio of 1 X 10(6). The SS heavily depends on the HfLaO/ZnO interface charges, a property which is related to the degree of crystallization of ZnO. The low VT and the small SS allow device voltage operation below 2 V for low power application. (C) 2009 The Electrochemical Society. [DOI: 10.1149/1.3257607] All rights reserved. | en_US |
| dc.identifier.doi | 10.1149/1.3257607 | en_US |
| dc.identifier.issn | 1099-0062 | en_US |
| dc.identifier.journal | ELECTROCHEMICAL AND SOLID STATE LETTERS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1149/1.3257607 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/6216 | |
| dc.identifier.wosnumber | WOS:000271668500013 | |
| dc.language.iso | en_US | en_US |
| dc.title | A Low Operating Voltage ZnO Thin Film Transistor Using a High-kappa HfLaO Gate Dielectric | en_US |
| dc.type | Article | en_US |