Impact of Geometry Aspect Ratio on 10-nm Gate-All-Around Silicon-Germanium Nanowire Field Effect Transistors

dc.citation.epage455en_US
dc.citation.spage452en_US
dc.citation.woscount0en_US
dc.contributor.authorChao, Pei-Jungen_US
dc.contributor.authorLi, Yimingen_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department分子醫學與生物工程研究所zh_TW
dc.contributor.department電機資訊學士班zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentInstitute of Molecular Medicine and Bioengineeringen_US
dc.contributor.departmentUndergraduate Honors Program of Electrical Engineering and Computer Scienceen_US
dc.date.accessioned2016-03-28T00:05:42Z
dc.date.available2016-03-28T00:05:42Z
dc.date.issued2014-01-01en_US
dc.description.abstractIn this paper, we study electrical characteristics of gate-all-around (GAA) silicon-germanium (SiGe) nanowire field effect transistors (NWFETS) with different aspect ratio (AR) of channel. Device characteristics: the subthreshold swing (SS), the drain induced barrier lowering (DIBL), and the I-ON/I-OFF ratio are simulated by using three-dimensional quantum mechanically corrected device simulation. Electrical characteristics of 10-nm-gate GAA Si1-xGex NWFET devices are explored with respect to different thickness of SiGe and Ge\'s mole fraction. It is investigated that an ellipse-shaped channel with a small aspect ratio possesses better DC characteristics, compared with the one which has large AR due to its good gate controllability.en_US
dc.identifier.isbn978-1-4799-5622-7en_US
dc.identifier.issnen_US
dc.identifier.journal2014 IEEE 14TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/129766
dc.identifier.wosnumberWOS:000365620600102en_US
dc.language.isoen_USen_US
dc.titleImpact of Geometry Aspect Ratio on 10-nm Gate-All-Around Silicon-Germanium Nanowire Field Effect Transistorsen_US
dc.typeProceedings Paperen_US

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