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Magnetoconductance oscillations in semiconductor-superconductor junctions with a laterally isolating barrier layer inside semiconductor region

dc.citation.epage246en_US
dc.citation.issue2en_US
dc.citation.spage237en_US
dc.citation.volume34en_US
dc.citation.woscount2
dc.contributor.authorHsue, YCen_US
dc.contributor.authorYang, TJen_US
dc.contributor.authorGu, BYen_US
dc.contributor.authorWang, Jen_US
dc.contributor.department電子物理學系zh_TW
dc.contributor.departmentDepartment of Electrophysicsen_US
dc.date.accessioned2014-12-08T15:40:39Z
dc.date.available2014-12-08T15:40:39Z
dc.date.issued2003-07-01en_US
dc.description.abstractThe oscillatory characteristics of magnetoconductance for a junction composed of a superconductor and a semiconductor, in which two parallel quantum wave guides are coupled with each other through a potential barrier layer, are studied systematically. To model the imperfectness of the interface, we introduce a delta-function scattering potential barrier lying close to the interface of the junction. The magnetoconductance oscillations (MCO) in this system stem from two sources: one is the interference of wave functions of quasi-particles due to multiple Andreev reflections at the interface; the other is attributed to the variation of the number of the propagation modes when introducing the isolating barrier layer. The introduction of the isolating layer in the quantum wave-guides strongly modifies MCO. We also present a physical picture for the MCO based on a phenomenological argument. The theoretically fitted results are in good agreement with numerical ones.en_US
dc.identifier.doi10.1140/epjb/e2003-00217-1en_US
dc.identifier.issn1434-6028en_US
dc.identifier.journalEUROPEAN PHYSICAL JOURNAL Ben_US
dc.identifier.urihttp://dx.doi.org/10.1140/epjb/e2003-00217-1en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/27738
dc.identifier.wosnumberWOS:000184935400013
dc.language.isoen_USen_US
dc.titleMagnetoconductance oscillations in semiconductor-superconductor junctions with a laterally isolating barrier layer inside semiconductor regionen_US
dc.typeArticleen_US

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