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Enhanced lateral heat dissipation packaging structure for GaN HEMTs on Si substrate

dc.citation.epage24en_US
dc.citation.issue1-2en_US
dc.citation.spage20en_US
dc.citation.volume51en_US
dc.citation.woscount2
dc.contributor.authorCheng, Stoneen_US
dc.contributor.authorChou, Po-Chienen_US
dc.contributor.authorChieng, Wei-Huaen_US
dc.contributor.authorChang, E. Y.en_US
dc.contributor.department機械工程學系zh_TW
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Mechanical Engineeringen_US
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.date.accessioned2014-12-08T15:29:51Z
dc.date.available2014-12-08T15:29:51Z
dc.date.issued2013-03-01en_US
dc.description.abstractThis work presents a technology for packaging AlGaN/GaN high electron mobility transistors (HEMTs) on a Si substrate. The GaN HEMTs are attached to a V-groove copper base and mounted on a TO-3P leadframe. The various thermal paths from the GaN gate junction to the case are carried out for heat dissipation by spreading to protective coating; transferring through the bond wires; spreading in the lateral device structure through the adhesive layer, and vertical heat spreading of silicon chip bottom. Thermal characterization showed a thermal resistance of 13.72 degrees C/W from the device to the TO-3P package. Experimental tests of a 30 mm gate-periphery single chip packaged in a 5 x 3 mm V-groove Cu base with a 100 V drain bias showed power dissipation of 22 W. (c) 2012 Elsevier Ltd. All rights reserved.en_US
dc.identifier.doi10.1016/j.applthermaleng.2012.08.009en_US
dc.identifier.issn1359-4311en_US
dc.identifier.journalAPPLIED THERMAL ENGINEERINGen_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.applthermaleng.2012.08.009en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/21402
dc.identifier.wosnumberWOS:000316036300003
dc.language.isoen_USen_US
dc.subjectGaN HEMTsen_US
dc.subjectPower electronicsen_US
dc.subjectThermal managementen_US
dc.subjectInfrared (IR) thermographyen_US
dc.titleEnhanced lateral heat dissipation packaging structure for GaN HEMTs on Si substrateen_US
dc.typeArticleen_US

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