AN AREA TIME-EFFICIENT MOTION ESTIMATION MICRO CORE
| dc.citation.epage | 303 | en_US |
| dc.citation.issue | 3 | en_US |
| dc.citation.spage | 298 | en_US |
| dc.citation.volume | 39 | en_US |
| dc.citation.woscount | 0 | |
| dc.contributor.author | CHEN, SG | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | 電子與資訊研究中心 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.contributor.department | Microelectronics and Information Systems Research Center | en_US |
| dc.date.accessioned | 2014-12-08T15:04:24Z | |
| dc.date.available | 2014-12-08T15:04:24Z | |
| dc.date.issued | 1993-08-01 | en_US |
| dc.description.abstract | An efficient micro architecture for motion estimation is proposed. It achieves better time and area performance than the existing structures. Through pipelining and effective manipulation of 2's complement arithmetic, the adder complexity is kept to its lowest, while speed for a combined subtraction, absolution and accumulation operations is made as fast as a carry-save addition (CSA). Together with a new DCT algorithm, the micro structure is further expanded and tailored to facilitate efficient execution of other video operations like DCT and filtering operations. | en_US |
| dc.identifier.doi | 10.1109/30.234597 | en_US |
| dc.identifier.issn | 0098-3063 | en_US |
| dc.identifier.journal | IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/30.234597 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/2912 | |
| dc.identifier.wosnumber | WOS:A1993LY44600023 | |
| dc.language.iso | en_US | en_US |
| dc.title | AN AREA TIME-EFFICIENT MOTION ESTIMATION MICRO CORE | en_US |
| dc.type | Article | en_US |