高介電氧化層奈米CMOS元件可靠性關鍵問題及界面量測技術研究(I)
| dc.contributor.author | 莊紹勳 | en_US |
| dc.contributor.author | Chung Steve S | en_US |
| dc.contributor.department | 國立交通大學電子工程學系 | zh_TW |
| dc.date.accessioned | 2014-12-13T10:33:04Z | |
| dc.date.available | 2014-12-13T10:33:04Z | |
| dc.date.issued | 2003 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.identifier.govdoc | NSC92-2215-E009-059 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=873536&docId=167355 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/91858 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | 高介電氧化層奈米CMOS元件可靠性關鍵問題及界面量測技術研究(I) | zh_TW |
| dc.title | Key Reliability Issues and Interface Characterization Techniques for High-K Nano-CMOS Devices (I) | en_US |
| dc.type | Plan | en_US |