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Dielectric degradation of Cu/SiO2/Si structure during thermal annealing

dc.citation.epage994en_US
dc.citation.issue3en_US
dc.citation.spage990en_US
dc.citation.volume143en_US
dc.citation.woscount21
dc.contributor.authorChiou, JCen_US
dc.contributor.authorWang, HIen_US
dc.contributor.authorChen, MCen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:02:48Z
dc.date.available2014-12-08T15:02:48Z
dc.date.issued1996-03-01en_US
dc.description.abstractThe impact of Cu on the dielectric SiO2 layer was studied using a Cu/SiO2/Si metal oxide semiconductor capacitor and rapid thermal annealing (RTA) treatment. With the RTA treatment, no chemical reaction was observed up to 900 degrees C; however, dielectric degradation occurred following RTA at 300 degrees C for 60 s and became worse with the increase of annealing temperature. The interface-trap density at the SiO2/Si interface also increased from 5 x 10(10) to 5 x 10(13) eV(-1) cm(-2) after 800 degrees C RTA treatment. The RTA anneal introduced a large number of positive Cu ions into the dielectric SiO2 layer. Under bias-temperature stress, Cu ions drift quickly in the SiO2 layer and may drift across the SiO2/Si interface and enter the Si substrate. With the use of 1200 Angstrom thick TiN and TiW barrier layers, respectively, the dielectric strength of the Cu/(barrier)/SiO2/Si structures was able to remain stable up to 500 and 600 degrees C.en_US
dc.identifier.issn0013-4651en_US
dc.identifier.journalJOURNAL OF THE ELECTROCHEMICAL SOCIETYen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/1424
dc.identifier.wosnumberWOS:A1996UC20300043
dc.language.isoen_USen_US
dc.titleDielectric degradation of Cu/SiO2/Si structure during thermal annealingen_US
dc.typeArticleen_US

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