三維積體電路(3D IC)之矽晶直通孔(TSV)與其它關鍵技術製程整合研究及應力量測熱傳導模型分析( II )

dc.contributor.author	陳冠能	en_US
dc.contributor.author	CHEN KUAN-NENG	en_US
dc.contributor.department	國立交通大學電子工程學系及電子研究所	zh_TW
dc.date.accessioned	2014-12-13T10:42:40Z
dc.date.available	2014-12-13T10:42:40Z
dc.date.issued	2011	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.identifier.govdoc	NSC100-2628-E009-010	zh_TW
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=2360021&docId=373806	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/99309
dc.language.iso	zh_TW	en_US
dc.subject	三維積體電路晶片	zh_TW
dc.subject	矽穿孔	zh_TW
dc.subject	晶圓薄化	zh_TW
dc.subject	晶圓接合	zh_TW
dc.subject	異質接合	zh_TW
dc.subject	金屬接合	zh_TW
dc.subject	附著層	zh_TW
dc.subject	3D IC	en_US
dc.subject	TSV	en_US
dc.subject	wafer thinning	en_US
dc.subject	wafer bonding	en_US
dc.subject	hybrid bonding	en_US
dc.subject	metal bonding	en_US
dc.subject	adhesion layer	en_US
dc.title	三維積體電路(3D IC)之矽晶直通孔(TSV)與其它關鍵技術製程整合研究及應力量測熱傳導模型分析( II )	zh_TW
dc.title	Studies of through Silicon VI a (Tsv) and Other Key Technologies in Three-Dimensional Integrated Circuit (3d Ic) with Stress Analysis and Thermal Conductivity Modeling	en_US
dc.type	Plan	en_US

Files

Now showing 1 - 1 of 1