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深次微米互補式金氧半製程技術下之混合電壓輸出入界面電路與靜電放電防護電路的設計

dc.contributor.author柯明道en_US
dc.contributor.authorKER MING-DOUen_US
dc.contributor.department國立交通大學電子工程學系zh_TW
dc.date.accessioned2014-12-13T10:36:18Z
dc.date.available2014-12-13T10:36:18Z
dc.date.issued2000en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.identifier.govdocNSC89-2215-E009-103zh_TW
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=583886&docId=109706en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/93852
dc.language.isozh_TWen_US
dc.title深次微米互補式金氧半製程技術下之混合電壓輸出入界面電路與靜電放電防護電路的設計zh_TW
dc.titleDesign of Mixed-Voltage I/O Interface Circuits and On-Chip ESD Protection Circuits in Sub-Quarter-Micron CMOS IC'sen_US
dc.typePlanen_US

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