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學術出版;;Publications
研究計畫;;Research Plans
高密度電子構裝接合與測試載具之開發---總計畫(III)
高密度電子構裝接合與測試載具之開發---總計畫(III)
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882216E009011.pdf
(314.87 KB)
Date
1999
Authors
邱碧秀
CHIOU BI-SHIOU
Journal Title
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Volume Title
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DOI
Abstract
Description
Keywords
電子封裝
,
多晶片模組
,
多層連線結構
,
基板製造
,
晶片接合
,
Electronic package
,
Multichip model (MCM)
,
Multilayer interconnection structure
,
Substrate fabrication
,
Chip interconnection
Citation
URI
https://www.grb.gov.tw/search/planDetail?id=429228&docId=76835
https://ir.lib.nycu.edu.tw/handle/11536/94408
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