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應用於深次微米CMOS元件之閘極氧化層與複晶矽介電層之技術開發

dc.contributor.author雷添福en_US
dc.contributor.authorLEI TAN-FUen_US
dc.contributor.department交通大學電子工程系zh_TW
dc.date.accessioned2014-12-13T10:46:15Z
dc.date.available2014-12-13T10:46:15Z
dc.date.issued2000en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.identifier.govdocNSC89-2215-E009-036zh_TW
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=720334&docId=135306en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/100693
dc.language.isozh_TWen_US
dc.title應用於深次微米CMOS元件之閘極氧化層與複晶矽介電層之技術開發zh_TW
dc.titleTechnology Development on Gate Oxides and Polysilicon Dielectric Layers for Deep Submicron CMOS Devicesen_US
dc.typePlanen_US

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