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Dynamic Characteristic Optimization of 14 a-Si:H TFTs Gate Driver Circuit Using Evolutionary Methodology for Display Panel Manufacturing

dc.citation.epage280en_US
dc.citation.issue5en_US
dc.citation.spage274en_US
dc.citation.volume7en_US
dc.citation.woscount2
dc.contributor.authorLi, Yimingen_US
dc.contributor.authorLee, Kuo-Fuen_US
dc.contributor.authorLo, I-Hsiuen_US
dc.contributor.authorChiang, Chien-Hshuehen_US
dc.contributor.authorHuang, Kuen-Yuen_US
dc.contributor.department傳播研究所zh_TW
dc.contributor.department電機工程學系zh_TW
dc.contributor.departmentInstitute of Communication Studiesen_US
dc.contributor.departmentDepartment of Electrical and Computer Engineeringen_US
dc.date.accessioned2014-12-08T15:11:42Z
dc.date.available2014-12-08T15:11:42Z
dc.date.issued2011-05-01en_US
dc.description.abstractFor thin-film transistor liquid crystal display (TFT-LCD) panel manufacturing, a gate driver circuit with amorphous silicon TFT plays an important role. In this paper, an amorphous silicon gate (ASG) driver circuit is optimized to improve circuit's dynamic characteristics. The adopted simulation-based evolutionary method integrates genetic algorithm and circuit simulator on the unified optimization framework. The circuit consisting of 14 hydrogenated amorphous silicon TFTs (a-Si: H TFTs) used in a large panel is optimized for the given specifications of the rise time < 1.5 mu s, the fall time < 1.5 mu s, and the ripple voltage < 3 V with minimizing the total layout area. By optimizing the width and passive components of the 14 devices, the results of this study successfully meet the desired specifications, where the sensitivity analysis is further conducted to verify the characteristic variation with respect to the optimized parameters. To validate the results, the optimized circuit is fabricated with 4-mu m a-Si: H TFT process, and the experimental result confirms the practicability of achieved design. The ripple voltage within 2.0 V is successfully obtained while the rise and fall times satisfy the required specifications for the fabricated sample. A 35% reduction of the optimized total devices width of a-Si: H TFTs is achieved.en_US
dc.identifier.doi10.1109/JDT.2010.2102336en_US
dc.identifier.issn1551-319Xen_US
dc.identifier.journalJOURNAL OF DISPLAY TECHNOLOGYen_US
dc.identifier.urihttp://dx.doi.org/10.1109/JDT.2010.2102336en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/8972
dc.identifier.wosnumberWOS:000289204500005
dc.language.isoen_USen_US
dc.subjectAmorphous silicon gate driver circuits (GDCs)en_US
dc.subjectdynamic characteristicen_US
dc.subjectfabricationen_US
dc.subjectfall timeen_US
dc.subjectgenetic algorithmen_US
dc.subjectliquid crystal display (LCD)en_US
dc.subjectmeasurementen_US
dc.subjectpanel manufacturingen_US
dc.subjectripple voltageen_US
dc.subjectrise timeen_US
dc.subjectsimulation-based optimizationen_US
dc.subjectthin-film transistor (TFT)en_US
dc.titleDynamic Characteristic Optimization of 14 a-Si:H TFTs Gate Driver Circuit Using Evolutionary Methodology for Display Panel Manufacturingen_US
dc.typeArticleen_US

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