THIN POLYOXIDE ON THE TOP OF POLY-SI GATE TO SUPPRESS BORON PENETRATION FOR PMOS
| dc.citation.epage | 165 | en_US |
| dc.citation.issue | 5 | en_US |
| dc.citation.spage | 164 | en_US |
| dc.citation.volume | 16 | en_US |
| dc.citation.woscount | 5 | |
| dc.contributor.author | LIN, YH | en_US |
| dc.contributor.author | LEE, CL | en_US |
| dc.contributor.author | LEI, TF | en_US |
| dc.contributor.author | CHAO, TS | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:03:26Z | |
| dc.date.available | 2014-12-08T15:03:26Z | |
| dc.date.issued | 1995-05-01 | en_US |
| dc.description.abstract | A method of using a thin oxide on the top of the poly-Si gate to getter fluorine for BF2+ in pMOS is proposed and demonstrated. Due to less amount of fluorine in the poly-Si as well as in the gate oxide, the boron penetration through the gate oxide is suppressed. The MOS capacitors fabricated by using this method show less shifts and distortion on C-V curves and better electrical characteristics. | en_US |
| dc.identifier.doi | 10.1109/55.382227 | en_US |
| dc.identifier.issn | 0741-3106 | en_US |
| dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/55.382227 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/1971 | |
| dc.identifier.wosnumber | WOS:A1995QW57100003 | |
| dc.language.iso | en_US | en_US |
| dc.title | THIN POLYOXIDE ON THE TOP OF POLY-SI GATE TO SUPPRESS BORON PENETRATION FOR PMOS | en_US |
| dc.type | Article | en_US |