RESIDUE ARITHMETIC VLSI ARRAY ARCHITECTURE FOR MANIPULATOR PSEUDO-INVERSE JACOBIAN COMPUTATION - REPLY
| dc.citation.epage | 717 | en_US |
| dc.citation.issue | 5 | en_US |
| dc.citation.spage | 717 | en_US |
| dc.citation.volume | 7 | en_US |
| dc.citation.woscount | 0 | |
| dc.contributor.author | CHANG, PP | en_US |
| dc.contributor.author | LEE, CSG | en_US |
| dc.contributor.department | 電信工程研究所 | zh_TW |
| dc.contributor.department | Institute of Communications Engineering | en_US |
| dc.date.accessioned | 2014-12-08T15:05:08Z | |
| dc.date.available | 2014-12-08T15:05:08Z | |
| dc.date.issued | 1991-10-01 | en_US |
| dc.identifier.issn | 1042-296X | en_US |
| dc.identifier.journal | IEEE TRANSACTIONS ON ROBOTICS AND AUTOMATION | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/3676 | |
| dc.identifier.wosnumber | WOS:A1991GH85200020 | |
| dc.language.iso | en_US | en_US |
| dc.title | RESIDUE ARITHMETIC VLSI ARRAY ARCHITECTURE FOR MANIPULATOR PSEUDO-INVERSE JACOBIAN COMPUTATION - REPLY | en_US |
| dc.type | Note | en_US |
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