Anomalous variations of OFF-state leakage current in poly-Si TFT under static stress

dc.citation.epage257en_US
dc.citation.issue5en_US
dc.citation.spage255en_US
dc.citation.volume23en_US
dc.citation.woscount19
dc.contributor.authorChang, KMen_US
dc.contributor.authorChung, YHen_US
dc.contributor.authorLin, GMen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:42:26Z
dc.date.available2014-12-08T15:42:26Z
dc.date.issued2002-05-01en_US
dc.description.abstractIn this letter, we study the anomalous variations of the OFF-state leakage current (I-OFF) in n-channel poly-Si thin-film transistors (TFTs) under static stress. The dominant mechanisms for the anomalous I-OFF can be attributed to 1) I-OFF increases due to channel hot electrons trapping at the gate oxide/channel interface and silicon grain boundaries and 2) I-OFF decreases due to hot holes accumulated/trapped near the channel/bottom oxide interface near the source region. Under the stress of high drain bias, serious impact ionization effect will occur to generate hot electrons and hot holes near the drain region. Some of holes will be injected into the gate oxide due to the vertical field (similar to(V_stress - V_ - Dstress) /T-ox) near the drain and the others will be migrated from drain to source along the channel due to lateral electric field (similar toV_Dstress/L-CH).en_US
dc.identifier.doi10.1109/55.998868en_US
dc.identifier.issn0741-3106en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/55.998868en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/28814
dc.identifier.wosnumberWOS:000175234700007
dc.language.isoen_USen_US
dc.subjectOFF-state leakage current (I-OFF)en_US
dc.subjectimpact ionizationen_US
dc.subjectpoly-Si TFTen_US
dc.titleAnomalous variations of OFF-state leakage current in poly-Si TFT under static stressen_US
dc.typeArticleen_US

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