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Modified polycrystalline silicon chemical-vapor deposition process for improving roughness at oxide/polycrystalline silicon interface

dc.citation.epage168en_US
dc.citation.issue1-2en_US
dc.citation.spage164en_US
dc.citation.volume472en_US
dc.citation.woscount0
dc.contributor.authorChang, JJen_US
dc.contributor.authorHsieh, TEen_US
dc.contributor.authorWang, YLen_US
dc.contributor.authorTseng, WTen_US
dc.contributor.authorLiu, CPen_US
dc.contributor.authorLan, CYen_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.date.accessioned2014-12-08T15:35:42Z
dc.date.available2014-12-08T15:35:42Z
dc.date.issued2005-01-24en_US
dc.description.abstractA new modified low pressure chemical-vapor deposition process for stacked polysilicon (poly-Si) films is developed in this study. The proposed stacked film process combines polysilicon with amorphous silicon films. In this process, polysilicon film was deposited first at 630degreesC, followed by a continuous temperature decrease down to 560degreesC for the deposition of amorphous silicon film. It was found that the doped stacked polysilicon films deposited by this process result in lowering of surface roughness, together with reduction of the (311) phase of the doped amorphous silicon and (110) phase of the doped polysilicon. As a consequence, device performance based on the stacked films also improves. Results of surface roughness analysis indicated that the doped stacked polysilicon film has a root-mean square surface roughness (Rrms) of 78 A, which is smaller than those of doped conventional (630degreesC) polysilicon film (Rrms=97 A), and doped amorphous silicon film (Rrms=123 A, deposited at 560degreesC). Transmission electron microscopic (TEM) observation performed at oxide/polysilicon interface showed that the conventional (630degreesC) oxide/polysilicon interface has high angle grain boundaries on the polysilicon side, which may induce leakage current around the interfacial area. (C) 2004 Elsevier B.V. All rights reserved.en_US
dc.identifier.doi10.1016/j.tsf.2004.06.165en_US
dc.identifier.issn0040-6090en_US
dc.identifier.journalTHIN SOLID FILMSen_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.tsf.2004.06.165en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/24107
dc.identifier.wosnumberWOS:000225748600026
dc.language.isoen_USen_US
dc.subjectannealingen_US
dc.subjectgrain boundaryen_US
dc.subjectsiliconen_US
dc.subjectsilicon oxideen_US
dc.titleModified polycrystalline silicon chemical-vapor deposition process for improving roughness at oxide/polycrystalline silicon interfaceen_US
dc.typeArticleen_US

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