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3-10 GHz ultra-wideband low-noise amplifier with new matching technique

dc.citation.epageU18en_US
dc.citation.issue16en_US
dc.citation.spage1102en_US
dc.citation.volume46en_US
dc.citation.woscount0
dc.contributor.authorLiang, C-P.en_US
dc.contributor.authorHuang, C-W.en_US
dc.contributor.authorLin, Y-K.en_US
dc.contributor.authorChung, S-J.en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.date.accessioned2014-12-08T15:48:34Z
dc.date.available2014-12-08T15:48:34Z
dc.date.issued2010-08-05en_US
dc.description.abstractA low-power and low-noise amplifier with a new input-matching technique using 0.18 mu m CMOS technology for ultra-wideband applications is presented. A proposed broadband input match can be acquired easily by selecting an appropriate width of the transistor, which will effectively avoid the usage of the low-Q on-chip inductors in the input network. Moreover, demonstrated is the feasibility of the inter-stage resonator to accomplish bandwidth enhancement without additional power consumption. The IC prototype achieves good performances such as a power gain of 16.2 dB, a better than 10 dB input return loss, and 2.3 dB minimum noise figure while consuming a DC core power of only 6.8 mW.en_US
dc.identifier.doi10.1049/el.2010.1279en_US
dc.identifier.issn0013-5194en_US
dc.identifier.journalELECTRONICS LETTERSen_US
dc.identifier.urihttp://dx.doi.org/10.1049/el.2010.1279en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/32307
dc.identifier.wosnumberWOS:000280653700006
dc.language.isoen_USen_US
dc.title3-10 GHz ultra-wideband low-noise amplifier with new matching techniqueen_US
dc.typeArticleen_US

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