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Analysis of DC characteristics and small signal equivalent circuit parameters of GaAs metal-semiconductor field effect transistors with different gate lengths and different gate contours by two-dimensional device simulations

dc.citation.epage6394en_US
dc.citation.issue9Aen_US
dc.citation.spage6389en_US
dc.citation.volume44en_US
dc.citation.woscount1
dc.contributor.authorMeng, CCen_US
dc.contributor.authorSu, JYen_US
dc.contributor.authorYang, SMen_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.date.accessioned2014-12-08T15:18:29Z
dc.date.available2014-12-08T15:18:29Z
dc.date.issued2005-09-01en_US
dc.description.abstractThe gate length and gate contour of a GaAs metal-semiconductor field effect transistor (MESFET) device play important roles in determining the small signal circuit parameters and large signal breakdown voltage behavior, GaAs MESFETs with different gate lengths and gate contours were studied by the two-dimensional (2-D) semiconductor device simulations to investigate the dependence of small signal circuit parameters and breakdown voltage on gate length and gate contour. The results show that gate length affects small-signal circuit parameter C(gs) while gate contour affects C(gd). The breakdown voltage has strong dependence on gate contour and little dependence on gage length.en_US
dc.identifier.doi10.1143/JJAP.44.6389en_US
dc.identifier.issn0021-4922en_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERSen_US
dc.identifier.urihttp://dx.doi.org/10.1143/JJAP.44.6389en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/13306
dc.identifier.wosnumberWOS:000232260700005
dc.language.isoen_USen_US
dc.subjectGaAs MESFETen_US
dc.subjectsmall signal equivalent circuit and 2-D device simulationen_US
dc.titleAnalysis of DC characteristics and small signal equivalent circuit parameters of GaAs metal-semiconductor field effect transistors with different gate lengths and different gate contours by two-dimensional device simulationsen_US
dc.typeArticleen_US

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