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Effects of independent double-gated configuration on polycrystalline-Si nonvolatile memory devices

dc.citation.epageen_US
dc.citation.issue13en_US
dc.citation.volume95en_US
dc.citation.woscount6
dc.contributor.authorChen, Wei-Chenen_US
dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorChang, Yu-Chiaen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:08:41Z
dc.date.available2014-12-08T15:08:41Z
dc.date.issued2009-09-28en_US
dc.description.abstractA polycrystalline-Si thin-film transistor configured with independent double-gated structure and ultrathin channel film is proposed for use as a Si-oxide-nitride-oxide-Si memory device. Taking advantage of additional control gate bias offered by the independent double-gated scheme in addition to the driving gate, this work demonstrated that the reading window and programming efficiency can be improved by applying a proper control gate bias. It is also found that the relationship between programming/erasing speed and control gate bias is strongly related to channel film thickness. Our results indicate that the independent double-gated device possesses promising potential for future nonvolatile memory applications. (C) 2009 American Institute of Physics. [doi: 10.1063/1.3238362]en_US
dc.identifier.doi10.1063/1.3238362en_US
dc.identifier.issn0003-6951en_US
dc.identifier.journalAPPLIED PHYSICS LETTERSen_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.3238362en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/6652
dc.identifier.wosnumberWOS:000270458000081
dc.language.isoen_USen_US
dc.titleEffects of independent double-gated configuration on polycrystalline-Si nonvolatile memory devicesen_US
dc.typeArticleen_US

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