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HETEROJUNCTION BIPOLAR-TRANSISTORS WITH EMITTER BARRIER LOWERED BY DELTA-DOPING

dc.citation.epage288en_US
dc.citation.issue8en_US
dc.citation.spage286en_US
dc.citation.volume15en_US
dc.citation.woscount24
dc.contributor.authorCHEN, HRen_US
dc.contributor.authorHUANG, CHen_US
dc.contributor.authorCHANG, CYen_US
dc.contributor.authorLEE, CPen_US
dc.contributor.authorTSAI, KLen_US
dc.contributor.authorTSANG, JSen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:03:52Z
dc.date.available2014-12-08T15:03:52Z
dc.date.issued1994-08-01en_US
dc.description.abstractAn Npn heterojunction bipolar transistor with a Si-delta-doped layer at the emitter-base hetero-interface is demonstrated. The Si delta-doped layer reduces the potential spike at the emitter junction. This design reserves the abruptness of the heterojunction, reduces electron barrier and increases the hole barrier simultaneously. Experimental results show that the HBT's turn-on characteristics are greatly improved while the current gain remains high. The offset voltages as low as 44 mV have been obtained. Very high current gains at very low collector current densities are obtained.en_US
dc.identifier.doi10.1109/55.296218en_US
dc.identifier.issn0741-3106en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/55.296218en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/2387
dc.identifier.wosnumberWOS:A1994PB03100008
dc.language.isoen_USen_US
dc.titleHETEROJUNCTION BIPOLAR-TRANSISTORS WITH EMITTER BARRIER LOWERED BY DELTA-DOPINGen_US
dc.typeArticleen_US

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