Highly sensitive focus monitoring on production wafer by scatterometry measurements for 90/65-nm node devices

Abstract

High performance analog (HPA) CMOS devices with multiple threshold voltages have been successfully fabricated in a 0.13-mu m logic-based mixed-signal CMOS process on a single chip. The HPA devices demonstrate superior drivability, dc gain, matching, and reliability using an optimized halo and lightly doped drain (LLD) engineering approach combined with a unique dual gate oxide module for aggressive gate oxide thickness scaling.