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A 385 MHz 13.54 K Gates Delay Balanced Two-Level CAVLC Decoder for Ultra HD H.264/AVC Video

dc.citation.epage1610en_US
dc.citation.issue11en_US
dc.citation.spage1604en_US
dc.citation.volume22en_US
dc.citation.woscount0
dc.contributor.authorLiao, Yuan-Hsinen_US
dc.contributor.authorLi, Gwo-Longen_US
dc.contributor.authorChang, Tian-Sheuanen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:29:01Z
dc.date.available2014-12-08T15:29:01Z
dc.date.issued2012-11-01en_US
dc.description.abstractTo satisfy the heavy performance requirement in real-time high-resolution H.264/AVC, very large-scale integrated implementation of the entropy decoder is necessary since it dominates the overall decoder throughput. In this paper, we propose a high-throughput delay balanced two-level context-based adaptive variable length coding (CAVLC) decoder with 21% shorter critical path delay in comparison to the traditional two-level decoder design. Furthermore, redundant decoding processes are removed by a skipping mechanism. The proposed CAVLC decoder only needs 127.13 cycles per macroblock on average to support level 5.1 decoding with 13.54 k gate counts under 90-nm CMOS technology.en_US
dc.identifier.doi10.1109/TCSVT.2012.2202081en_US
dc.identifier.issn1051-8215en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGYen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSVT.2012.2202081en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/20931
dc.identifier.wosnumberWOS:000313971700007
dc.language.isoen_USen_US
dc.subjectContext-adaptive variable length decoder (CAVLD)en_US
dc.subjectH.264en_US
dc.titleA 385 MHz 13.54 K Gates Delay Balanced Two-Level CAVLC Decoder for Ultra HD H.264/AVC Videoen_US
dc.typeArticleen_US

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