A 30-MHZ TRELLIS CODEC CHIP FOR PARTIAL-RESPONSE CHANNELS
| dc.citation.epage | 1987 | en_US |
| dc.citation.issue | 12 | en_US |
| dc.citation.spage | 1981 | en_US |
| dc.citation.volume | 26 | en_US |
| dc.citation.woscount | 6 | |
| dc.contributor.author | SHUNG, CB | en_US |
| dc.contributor.author | SIEGEL, PH | en_US |
| dc.contributor.author | THAPAR, HK | en_US |
| dc.contributor.author | KARABED, R | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:05:04Z | |
| dc.date.available | 2014-12-08T15:05:04Z | |
| dc.date.issued | 1991-12-01 | en_US |
| dc.description.abstract | We present a rate 8/10 matched-spectral-null (MSN) trellis codec chip which can increase noise tolerance in partial-response channels applicable to digital magnetic recording. The Viterbi detector in this codec features an area-efficient pipelined architecture and a modulo metric normalization technique. The chip was implemented in a 1.2-mu-m CMOS process with a die size of 22 mm2. It offers a 12-Mb/s data rate when operating at 30 MHz. Experimental results verified the predicted coding gain of 2.8 dB relative to the uncoded system at a bit-error rate of 10(-7). | en_US |
| dc.identifier.doi | 10.1109/4.104192 | en_US |
| dc.identifier.issn | 0018-9200 | en_US |
| dc.identifier.journal | IEEE JOURNAL OF SOLID-STATE CIRCUITS | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/4.104192 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/3605 | |
| dc.identifier.wosnumber | WOS:A1991GQ90500031 | |
| dc.language.iso | en_US | en_US |
| dc.subject | CODEC CHIP | en_US |
| dc.subject | TRELLIS CODE | en_US |
| dc.subject | PARTIAL RESPONSE | en_US |
| dc.title | A 30-MHZ TRELLIS CODEC CHIP FOR PARTIAL-RESPONSE CHANNELS | en_US |
| dc.type | Article | en_US |