Symmetric Vertical-Channel Nickel-Salicided Poly-Si Thin-Film Transistors With Self-Aligned Oxide Overetching Structures

Abstract

This paper reports the impacts of NH(3) plasma treatment time, oxide overetching depth, and gate oxide thickness on symmetric vertical-channel Ni-salicided poly-Si thin-film transistors (VSA-TFTs) for the first time. OFF-state currents may be improved by increasing the oxide overetching depth. The ON/OFF current ratio may be also improved by increasing the oxide overetching depth. The NH(3) plasma optimum treatment time of VSA-TFTs is significantly shorter than that of conventional top-gate horizontal-channel TFTs. The performance of VSA-TFTs is degraded by NH(3) plasma treatment for too long a time. VSA-TFTs with 15-nm gate oxide thickness display better subthreshold swing (< 150 mV/dec) than VSA-TFTs with 30-nm gate oxide thickness. OFF-state currents can be improved by increasing L(mask), even when the oxide overetching depth and the gate oxide thickness are changed.