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CMOS current-mode neural associative memory design with on-chip learning

dc.citation.epage181en_US
dc.citation.issue1en_US
dc.citation.spage167en_US
dc.citation.volume7en_US
dc.citation.woscount14
dc.contributor.authorWu, CYen_US
dc.contributor.authorLan, JFen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:02:54Z
dc.date.available2014-12-08T15:02:54Z
dc.date.issued1996-01-01en_US
dc.description.abstractBased on the Grossberg mathematical model called the outstar, a modular neural net with on-chip learning and memory is designed and analyzed. The outstar is the minimal anatomy that can interpret the classical conditioning or associative memory, It can also be served as a general-purpose pattern learning device. To realize the outstar, CMOS (complimentary metal-oxide semiconductor) current-mode analog dividers are developed to implement the special memory called the ratio-type memory. Furthermore, a CMOS current-mode analog multiplier is used to implement the correlation. The implemented CMOS outstar can on-chip store the relative ratio values of the trained weights for a long time. It can also be modularized to construct general neural nets, HSPICE (a circuit simulator of Meta Software, Inc.) simulation results of the CMOS outstar circuits as associative memory and pattern learner have successfully verified their functions, The measured results of the fabricated CMOS outstar circuits have also successfully confirmed the ratio memory and on-chip learning capability of the circuits, Furthermore, it has been shown that the storage time of the ratio memory can be as long as five minutes without refreshment, Also the outstar can enhance the contrast of the stored pattern within a long period, This makes the outstar circuits quite feasible in many applications.en_US
dc.identifier.doi10.1109/72.478401en_US
dc.identifier.issn1045-9227en_US
dc.identifier.journalIEEE TRANSACTIONS ON NEURAL NETWORKSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/72.478401en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/1513
dc.identifier.wosnumberWOS:A1996TQ67100015
dc.language.isoen_USen_US
dc.titleCMOS current-mode neural associative memory design with on-chip learningen_US
dc.typeArticleen_US

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