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Insight into the performance enhancement of double-gated polycrystalline silicon thin-film transistors with ultrathin channel

dc.citation.epageen_US
dc.citation.issue7en_US
dc.citation.volume96en_US
dc.citation.woscount3
dc.contributor.authorLin, Zer-Mingen_US
dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorChen, Wei-Chenen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:07:24Z
dc.date.available2014-12-08T15:07:24Z
dc.date.issued2010-02-15en_US
dc.description.abstractIn this letter, characteristics of independently-controllable double-gated polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with ultrathin channel are characterized and analyzed experimentally and theoretically. As compared with the single-gated mode where only one of the gates is used for driving the device, 1.3-2.1 fold increase in drive current is achieved under double-gated mode as the two gates are biased simultaneously for driving the device. A remarkable lowering of barrier height 7-12 meV in the latter case due to the coupling of the two gate biases is identified as the major origin for such performance enhancement.en_US
dc.identifier.doi10.1063/1.3327336en_US
dc.identifier.issn0003-6951en_US
dc.identifier.journalAPPLIED PHYSICS LETTERSen_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.3327336en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/5839
dc.identifier.wosnumberWOS:000274758100040
dc.language.isoen_USen_US
dc.subjectelemental semiconductorsen_US
dc.subjectsemiconductor thin filmsen_US
dc.subjectsiliconen_US
dc.subjectthermionic emissionen_US
dc.subjectthin film transistorsen_US
dc.titleInsight into the performance enhancement of double-gated polycrystalline silicon thin-film transistors with ultrathin channelen_US
dc.typeArticleen_US

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